An analytical model for designing memory hierarchies

An Analytical Model for Designing Memory Hierarchies

| Memory hierarchies have long been studied by many means: system building, trace-driven simulation, and mathematical analysis. Yet little help is available for the system designer wishing to quickly size the di erent levels in a memory hierarchy to a rst-order approximation. In this paper, we present a simple analysis for providing this practical help and some unexpected results and intuition ...

Jacob Et Al : an Analytical Model for Designing Memory Hierarchies

| Memory hierarchies have long been studied by many means: system building, trace-driven simulation, and mathematical analysis. Yet little help is available for the system designer wishing to quickly size the diierent levels in a memory hierarchy to a rst-order approximation. In this paper , we present a simple analysis for providing this practical help and some unexpected results and intuition...

Analytical Model For Patching VoD Cache Hierarchies

Designing Database Operators for Flash-enabled Memory Hierarchies

Flash memory affects not only storage options but also query processing. In this paper, we analyze the use of flash memory for database query processing, including algorithms that combine flash memory and traditional disk drives. We first focus on flash-resident databases and present data structures and algorithms that leverage the fast random reads of flash to speed up selection, projection, a...

An Improved Analytical Superscalar Microprocessor Memory Model

As the number of transistors that can be integrated onto a single chip continues to increase exponentially, a growing challenge is modeling performance with reasonable accuracy in the early stages of processor design. While methodologies for execution driven simulations are well understood, comparatively little is known about how to develop accurate analytical models. Processor architects in in...